the impact of cyber attacks. To achieve cyber resilience, Trusted
Computing Group (TCG) proposed an instance, called resilience
engine (RE) that can provide additional security services to a
host system. However, state-of-the-art RE solutions either utilize
dedicated hardware to realize some RE functionalities or are not
well-suited for resource-constrained IoT devices. This makes it
hard to deploy these solutions on IoT devices, which lack dedicated
hardware. We, therefore, present a method to implement
an RE purely in firmware using lightweight cryptography, such
as Ascon, without any additional hardware support and only
leveraging minimal existing processor features. These processor
features are privilege levels and memory protection available in
most current IoT processor architectures. A proof-of-concept
firmware RE for ARM Cortex-M and RISC-V processors is
presented, including a potential DICE architecture integration
to achieve resilience both at boot time and runtime.
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the impact of cyber attacks. To achieve cyber resilience, Trusted
Computing Group (TCG) proposed an instance, called resilience
engine (RE) that can provide additional security services to a
host system. However, state-of-the-art RE solutions either utilize
dedicated hardware to realize some RE functionalities or are not
well-suited for resource-constrained IoT devices. This makes it
hard to deploy these solutions on IoT devices, which lack dedicated
hardware. We, therefore, present a met...
»