Games belong to the most popular but power-
hungry applications on smartphones. Gaming workloads exhibit
highly variable and user-interactive behavior, which makes it
hard to predict the workload. Modern MPSoC (multiproces-
sor system-on-chip) platforms are equipped with heterogeneous
multi-processing (HMP) processors comprising performance-
oriented and energy-efficiency cores in order to better exploit
power-performance trade-offs among different types of applica-
tions. To minimize the energy consumption of games on HMP
platforms, it is essential to precisely predict the gaming workload
and perform joint thread-to-core allocation as well as dynamic
voltage and frequency scaling (DVFS).
In this paper, we propose a frame- and thread-based MPSoC
power management strategy for games. We focus on the fact
that gaming workload has high temporal correlation among
frames and evaluate selected workload predictors on a per-
frame basis. Moreover, we find that there are two categories
of thread workloads, periodic and aperiodic, and hence, propose
to use a hybrid workload predictor. Based on the per-thread
predictions, the power manager allocates the threads among the
heterogeneous cores in an evenly distributed fashion in order to
minimize the operating frequency while keeping the frames-per-
second (FPS) constraint. We implement the game power manager
as an Android governor on a state-of-the-art platform based on
the Exynos5422 SoC, which is also incorporated in the Samsung
Galaxy S5 smartphone. Our measurement results show that we
save on average 41.9% of energy compared to the Android default
governor. Further, we have performed a user study to evaluate
the user perception of our governor. The gaming experience was
rated between good and very good for all games.
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Games belong to the most popular but power-
hungry applications on smartphones. Gaming workloads exhibit
highly variable and user-interactive behavior, which makes it
hard to predict the workload. Modern MPSoC (multiproces-
sor system-on-chip) platforms are equipped with heterogeneous
multi-processing (HMP) processors comprising performance-
oriented and energy-efficiency cores in order to better exploit
power-performance trade-offs among different types of applica-
tions. To minimize th...
»