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Title:

Performance and Communication Cost of Hardware Accelerators for Hashing in Post-Quantum Cryptography

Document type:
Zeitschriftenaufsatz
Author(s):
Karl, Patrick and Schupp, Jonas and Sigl, Georg
Abstract:
SPHINCS+ is a signature scheme included in the irst NIST post-quantum standard, that bases its security on the underlying hash primitive. As most of the runtime of SPHINCS+ is caused by the evaluation of several hash- and pseudo-random functions, oloading this computation to dedicated hardware accelerators is a natural step. In this work, we evaluate diferent architectures for hardware acceleration of such a hash primitive with respect to its use-case and evaluate them in the context of SPHI...     »
Keywords:
CCS Concepts: · Security and privacy→Hardware security implementation; Hash functions and message authentication codes
Dewey Decimal Classification:
620 Ingenieurwissenschaften
Journal title:
ACM Trans. Embed. Comput. Syst.
Year:
2024
Year / month:
2024-07
Quarter:
3. Quartal
Month:
Jul
Fulltext / DOI:
doi:10.1145/3676965
WWW:
https://doi.org/10.1145/3676965
Publisher:
Association for Computing Machinery
Notes:
Just Accepted
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