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CorrectBench: Automatic Testbench Generation with Functional Self-Correction using LLMs for HDL Design
Design, Automation and Test in Europe (DATE)
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Dynamic Topology-Aware Flow Path Construction and Scheduling Optimization for Multilayered Continuous-Flow Microfluidic Biochips
IEEE/ACM Asia and South Pacific Design Automation Conference (ASP-DAC)
2025

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3M-DeSyn: Design Synthesis for Multi-Layer 3D-Printed Microfluidics with Timing and Volumetric Control
IEEE/ACM Asia and South Pacific Design Automation Conference (ASP-DAC)
2025

Zheng, Zhidan; Chang, You-Jen; Cheng, Liaoyuan; Tseng, Tsun-Ming; Schlichtmann, Ulf
A Backup Resource Customization and Allocation Method for Wavelength-Routed Optical Networks-on-Chip Topologies
IEEE/ACM Asia and South Pacific Design Automation Conference (ASP-DAC)
2025

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CPONoC: Critical Path-aware Physical Implementation for Optical Networks-on-Chip
IEEE/ACM Asia and South Pacific Design Automation Conference (ASP-DAC)
2025