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Titel:

Using Hardware Software Codesign for Optimised Implementations of High-Speed and Defence in Depth CAESAR Finalists

Dokumenttyp:
Konferenzbeitrag
Art des Konferenzbeitrags:
Vortrag / Präsentation
Autor(en):
Tempelmeier, M. and Werner, M. and Sigl, G.
Abstract:
In this work, we present five optimised implementations on a Xilinx-Zynq7200 SoC for the high-speed and defence in depth finalists of the CAESAR competition for finding authenticated encryption ciphers. We eliminated the standard interfaces used during the competition. Through optimised interfaces between hardware and software, we were able to get both performance improvements as well as reduction in used programmable logic. The performance of our implementations is comparable to pure hardware i...     »
Stichworte:
Hardware; Software; Ciphers; Encryption; Protocols
Dewey-Dezimalklassifikation:
620 Ingenieurwissenschaften
Kongress- / Buchtitel:
2019 IEEE International Symposium on Hardware Oriented Security and Trust (HOST)
Kongress / Zusatzinformationen:
Washington, D.C., USA
Datum der Konferenz:
May 6 - 10, 2019
Jahr:
2019
Quartal:
2. Quartal
Jahr / Monat:
2019-05
Monat:
May
Seiten:
228-237
Reviewed:
ja
Sprache:
en
Volltext / DOI:
doi:10.1109/HST.2019.8740843
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