Baris Yigit
Machine Learning Methods for Statistical Circuit Design
Bachelorarbeit
2017

Chou, Pang-Yen;Chen, Nai-Chen;Lin, Mark Po-Hung;Graeb, Helmut
Matched-Routing Common-Centroid 3-D MOM Capacitors for Low-Power Data Converters
IEEE Transactions on Very Large Scale Integration Systems (TVLSI)
2017

Zwerger, Michael;Neuner, Maximilian;Graeb, Helmut
Analog Power-Down Synthesis
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
2017

Hu, Yong;Mueller-Gritschneder, Daniel;Schlichtmann, Ulf
A Model-based Framework For Networks-on-Chip Design Space Exploration
2nd International Workshop on Advanced Interconnect Solutions and Technologies for Emerging Computing Systems (AISTECS)
2017
jan

Wang, Qin;Zuo, Shiliang;Yao, Hailong;Ho, Tsung-Yi;Li, Bing;Schlichtmann, Ulf;Cai, Yici
Hamming-Distance-Based Valve-Switching Optimization for Control Multiplexing in Flow-Based Microfluidic Biochip (pdf)
IEEE/ACM Asia and South Pacific Design Automation Conference (ASP-DAC)
2017

Verification and Synthesis of Analog Power-Down Circuits
Zwerger, Michael
2017
Dissertation

Liu, Chunfeng;Li, Bing;Bhattacharya, Bhargab B.;Chakrabarty, Krishnendu;Ho, Tsung-Yi;Schlichtmann, Ulf
Testing Microfluidic Fully Programmable Valve Arrays (FPVAs) (pdf)
Design, Automation and Test in Europe (DATE)
2017

Chen, Nai-Chen;Chou, Pang-Yen;Graeb, Helmut;Lin, Mark Po-Hung
High-Density MOM Capacitor Array with Novel Mortise-Tenon Structure for Low-Power SAR ADCs
Design, Automation and Test in Europe (DATE)
2017

Ibrahim, Mohamed;Chakrabarty, Krishnendu;Schlichtmann, Ulf
CoSyn: Efficient single-cell analysis using a hybrid microfluidic platform
Design, Automation & Test in Europe Conference & Exhibition (DATE)
2017

Glocker, Elisabeth;Chen, Qingqing;Schlichtmann, Ulf;Landsiedel, Doris Schmitt
Emulation of an {ASIC} Power and Temperature Monitoring System (eTPMon) for {FPGA} Prototyping
Microprocessors and Microsystems
2017
50
may
90--101