Dhiraj Pathania
Statistical Delay Prediction for Configuring PST Buffers using Correlation-Based Clustering
Projektarbeit
2016

Armin Sadighi
Timing with flexible flip flop model using piecewise linearization
Masterarbeit
2016

Yasamin Moradi
Introducing a new approach for mixer assignment, routing, and storage of fluid in Microfluidic Biochips
Masterarbeit
2016

Tabacaru, Bogdan Andrei;Chaari, Moomen;Ecker, Wolfgang;Kruse, Thomas;Novello, Cristiano
{Optimization of Transient-Fault Injection Through Analysis of Simulation Traces}
edaWorkshop
2016
1--6

Tabacaru, Bogdan Andrei;Chaari, Moomen;Ecker, Wolfgang;Kruse, Thomas;Novello, Cristiano
{Speeding up Safety Verification by Fault Abstraction and Simulation to Transaction Level}
IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC)
2016
1--6

Tabacaru, Bogdan Andrei;Chaari, Moomen;Ecker, Wolfgang;Kruse, Thomas;Novello, Cristiano
{Fault-Effect Analysis on System-Level Hardware Modeling using Virtual Prototypes}
Forum on Specification and Design Languages (FDL)
2016
1--7

Tabacaru, Bogdan Andrei;Chaari, Moomen;Ecker, Wolfgang;Kruse, Thomas;Novello, Cristiano
{Gate-Level-Accurate Fault-Effect Analysis at Virtual-Prototype Speed}
ERCIM/EWICS/ARTEMIS Workshop on ``Dependable Embedded and Cyber-physical Systems and Systems-of-Systems'' (DECSoS'16)
2016
1--13

Tabacaru, Bogdan Andrei;Chaari, Moomen;Ecker, Wolfgang;Kruse, Thomas;Novello, Cristiano
{Efficient Checkpointing-Based Safety-Verification Flow Using Compiled-Code Simulation}
Digital System Design (DSD), 2016 Euromicro Conference on
2016
1--8

Tabacaru, Bogdan Andrei;Chaari, Moomen;Ecker, Wolfgang;Kruse, Thomas;Novello, Cristiano
{Fault-Effect Analysis on Multiple Abstraction Levels in Hardware Modeling}
DVCon USA
2016
1--12

Tabacaru, Bogdan Andrei;Chaari, Moomen;Ecker, Wolfgang;Kruse, Thomas;Novello, Cristiano
{Safety-Verification Flow Sporting Gate-Level Accuracy and Near Virtual-Prototype Speed}
DVCon Europe
2016
1--8