Kayed Ghattas
Assigning Ranges of Post-Silicon Tunable Buffers and Efficient Test for Yield Improvement
2014

Kayed Ghattas
Assigning Ranges of Post-Silicon Tunable Buffers and Efficient Test for Yield Improvement
Projektarbeit
2014

Glocker, Elisabeth;Boppu, Srinivas;Chen, Qingqing;Schlichtmann, Ulf;Teich, Jürgen;Schmitt-Landsiedel, Doris
Temperature Modeling and Emulation of an ASIC Temperature Monitor System for Tightly-Coupled Processor Arrays (TCPAs)
Advances in Radio Science
2014
12
103--109

Glocker, Elisabeth;Chen, Qingqing;Zaidi, Asheque;Schlichtmann, Ulf;Schmitt-Landsiedel, Doris
Emulierung eines ASIC-Leistungsverbrauchs- und Temperaturmonitorsystems für FPGA-Prototyping eines ressourcengewahren Computersystems
16. Workshop Analogschaltungen
2014

Schlichtmann, Ulf;Kleeberger, Veit B.;Abraham, Jacob A.;Evans, Adrian;Gimmler-Dumont, Christina;Glaß, Michael;Herkersdorf, Andreas;Nassif, Sani R.;Wehn, Norbert
Connecting Different Worlds – Technology Abstraction for Reliability-Aware Design and Test
Design, Automation and Test in Europe (DATE)
2014

Miller, Felix;Todorov, Vladimir;Wild, Thomas;Mueller-Gritschneder, Daniel;Herkersdorf, Andreas;Schlichtmann, Ulf
A TSV-Property-aware Synthesis Method for Application-Specific 3D-NoCs Design
Design Automation and Test in Europe (DATE), Friday Workshop on 3D Integration
2014

Linder, Michael;Eder, Alfred;Oberländer, Klaus;Schlichtmann, Ulf
An Analysis of Industrial SRAM Test Results—A Comprehensive Study on Effectiveness and Classification of March Test Algorithms
IEEE Design and Test
2014
may

Chou, Pang-Yen;Graeb, Helmut
Platzierung von Kapazitäts-Arrays: ein konstruktiver Ansatz
edaWorkshop
2014

Boos, Anja;Ramini, Luca;Bertozzi, Davide;Schlichtmann, Ulf
Ein Platzier- und Verdrahtungsalgorithmus für Optische Networks-on-Chip zur Minimierung der Einfügedämpfung
edaWorkshop
2014

Kleeberger, Veit B.;Dorfner, Magdalena;Schlichtmann, Ulf
Evaluation of Sequential Circuit Resilience in Early Design Stages
edaWorkshop
2014