Barenghi, A.; Bertoni, G.; De Santis, F.; Melzani, F.
On the Efficiency of Design Time Evaluation of the Resistance to Power Attacks
circuit simulations; cryptographic algorithm; design time evaluation; design time power estimation tools; differential power attacks; fast feedback loops; power analysis attacks; security; side-channel attacks; cryptography
Book / Congress title:
Digital System Design (DSD), 2011 14th Euromicro Conference on