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Titel:

Prototyping Reconfigurable RRAM-Based AI Accelerators Using the  RISC-V Ecosystem and  Digital Twins

Dokumenttyp:
Konferenzbeitrag
Autor(en):
Fritscher, Markus; Veronesi, Alessandro; Baroni, Andrea; Wen, Jianan; Spätling, Thorsten; Mahadevaiah, Mamathamba Kalishettyhalli; Herfurth, Norbert; Perez, Eduardo; Ulbricht, Markus; Reichenbach, Marc; Hagelauer, Amelie; Krstic, Milos
Abstract:
The recent decades have given advent to the rise of sophisticated High Performance Computing (HPC) accelerators, vastly speeding up calculations. In the last years dedicated AI accelerators, meant for the evaluation of Artificial Neural Networks, have gathered traction. Resistive Random Access Memory (RRAM) devices are a possible future candidate for these accelerators since crossbar implementations allow for the evaluation of matrix vector multiplications in O(1). Unfortunately integrating thes...     »
Stichworte:
RRAM, HPC, RISC-V, ANN, System integration, ASIC, EDA
Kongress- / Buchtitel:
High Performance Computing: ISC High Performance 2023 International Workshops, Hamburg, Germany, May 21–25, 2023, Revised Selected Papers
Verlag / Institution:
Springer-Verlag
Verlagsort:
Berlin, Heidelberg
Jahr:
2023
Seiten:
500–514
Print-ISBN:
978-3-031-40842-7
Volltext / DOI:
doi:10.1007/978-3-031-40843-4_37
WWW:
https://doi.org/10.1007/978-3-031-40843-4_37
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