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Title:

Physical and Functional Reverse Engineering Challenges for Advanced Semiconductor Solutions

Document type:
Konferenzbeitrag
Author(s):
Lippmann, Bernhard and Ludwig, Matthias and Mutter, Johannes and Bette, Ann-Christin and Hepp, Alexander and Baehr, Johanna and Rasche, Martin and Kellermann, Oliver and Gieser, Horst and Zweifel, Tobias and Kovac, Nicola
Abstract:
Motivated by the threats of malicious modification and piracy arising from worldwide distributed supply chains, the goal of RESEC is the creation, verification, and optimization of a complete reverse engineering process for integrated circuits manufactured in technology nodes of 40 nm and below. Building upon the presentation of individual reverse engineering process stages, this paper connects analysis efforts and yields with their impact on hardware security, demonstrated on a design wi...     »
Keywords:
Hardware Reverse Engineering, Layout Extraction, SEM Imaging, Image Processing, RISC-V, Hardware Trojans
Dewey Decimal Classification:
620 Ingenieurwissenschaften
Book / Congress title:
2022 Design, Automation & Test in Europe Conference & Exhibition DATE
Congress (additional information):
Antwerp, Belgium
Publisher:
IEEE
Publisher address:
Antwerp, Belgium
Year:
2022
Quarter:
1. Quartal
Year / month:
2022-03
Month:
Mar
Reviewed:
ja
Language:
en
WWW:
https://www.date-conference.com/
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