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Title:

INTEGRATED CIRCUIT INCLUDING DOPED SEMICONDUCTOR LINE HAVING CONDUCTIVE CLADDING

Document type:
Patentanmeldung
Patent application number:
US 2010061140 (A1)
Inventor:
KLOSTERMANN, ULRICH [DE]; GRUENING-VON SCHWERIN, ULRIKE [DE]; KREUPL, FRANZ [DE]
Patent office:
USA
Publication date application:
11.03.2010
Year:
2010
Language:
de
TUM Institution:
Hybride Elektronische Systeme
Format:
Text
 BibTeX