1-Bit Full Adder in Perpendicular Nanomagnetic Logic using a Novel 5-Input Majority Gate
EPJ Web of Conferences
2014
75
05001
Compact modeling of perpendicular nanomagnetic logic based on threshold gates
Journal of Applied Physics
2014
115
17
17d104
Controlled Domain Wall Pinning in Nanowires with Perpendicular Magnetic Anisotropy by Localized Fringing Fields
Journal of Applied Physics
2014
115
17d506
Influence of the Domain Wall Nucleation Time on the Reliability of Perpendicular Nanomagnetic Logic
Proceedings of the 14\textsuperscriptth IEEE International Conference on Nanotechnology (IEEE-NANO)
2014
Nanomagnetic logic conquering the 3\textsuperscriptrd dimension
IMEC Workshop Beyond CMOS
2014
Signal crossing in perpendicular nanomagnetic logic
Journal of Applied Physics
2014
115
17
17e510
Threshold Gate-Based Circuits From Nanomagnetic Logic
Nanotechnology, IEEE Transactions on
2014
13
5
990--996
Towards on-chip clocking of perpendicular Nanomagnetic Logic
Solid-State Electronics -- Selected papers from ESSDERC 2013
2014
102
46--51