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Titel:

Design of a Systolic Pattern Matcher for Nanomagnet Logic

Dokumenttyp:
Konferenzbeitrag
Art des Konferenzbeitrags:
Textbeitrag / Aufsatz
Autor(en):
Ju, X.; Kiermaier, J.; Becherer, M.; S.B.; Porod, W.; Schmitt-Landsiedel, D.; Lugli, P.; Csaba, G.
Abstract:
Nanomagnet Logic (NML) is widely considered to be one of the promising for “beyond-CMOS” nanoscale architectures. So far only relatively simple circuits (nanomagnetic logic gates and adders) have been studied experimentally and in simulations. Here we investigate the possibility of building larger-scale computing devices from out-of-plane NML. We designed a systolic pattern matcher circuit that is in principle scalable to arbitrary number of nanomagnets and can match arbitrarily long patterns in...     »
Kongress- / Buchtitel:
15th International Workshop on Computational Electronics (IWCE)
Kongress / Zusatzinformationen:
Madison WI USA, May 22 - 25, 2012-05
Verlag / Institution:
IEEE Xplore Digital Library
Jahr:
2012
Quartal:
2. Quartal
Jahr / Monat:
2012-05
Monat:
May
Seiten:
1 - 3
Print-ISBN:
978-1-6473-0705-5
Reviewed:
ja
Sprache:
en
Erscheinungsform:
Print
Volltext / DOI:
doi:10.1109/IWCE.2012.6242837
WWW:
http://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=6242837
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