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Title:

Vertical interconnect structure, memory device and associated production method

Document type:
Patent
Patent number:
US 9177995 B2
Inventor:
Martin Gutsche; Franz Kreupl; Harald Seidl
Assignee:
Martin Gutsche; Franz Kreupl; Harald Seidl
Abstract:
The present invention relates to a method for producing a vertical interconnect structure, a memory device and an associated production method, in which case, after the formation of a contact region in a carrier substrate a catalyst is produced on the contact region and a free-standing electrically conductive nanoelement is subsequently formed between the catalyst and the contact region and embedded in a dielectric layer.
Patent office:
US
Publication date patent:
03.11.2015
Year:
2015
Covered by:
Scopus
TUM Institution:
Hybride Elektronische Systeme
Format:
Text
 BibTeX