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- Titel:
Stacked 3-dimensional 6T SRAM cell with independent double gate transistors
- Autor(en):
- Weis, M.; Pfitzner, A.; Kasprowicz, D.; Emling, R.; Fischer, T.; Henzler, S.; Maly, W.; Schmitt-Landsiedel, D.
- Seitenangaben Beitrag:
- 169-172
- Stichworte:
- SRAM chips, field effect transistorscell stability, compact stacked 3D memory cell topology, independent double gate transistors, memory cell area reduction, read operation, stacked 3-dimensional 6T SRAM cell, vertical slit field effect transistor, write operation
- Kongress- / Buchtitel:
- IC Design and Technology, 2009. ICICDT '09. IEEE International Conference on
- Jahr:
- 2009
- Monat:
- May
- Volltext / DOI:
- doi:10.1109/ICICDT.2009.5166288
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