This thesis presents simulation-based methods for the complex design of go/no-go test criteria for analog integrated circuits. Based on robust optimization methods, the objectives yield loss and fault loss, which determine the quality of a test, are minimized considering measurement errors. For an efficient calculation of the robustness measures, the methods benefit from available results of circuit design and yield optimization. Due to a subtle combination of deterministic and stochastic approaches the simulation effort is low. A comparison with the state-of-the-art shows the efficiency of the test design methods.
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This thesis presents simulation-based methods for the complex design of go/no-go test criteria for analog integrated circuits. Based on robust optimization methods, the objectives yield loss and fault loss, which determine the quality of a test, are minimized considering measurement errors. For an efficient calculation of the robustness measures, the methods benefit from available results of circuit design and yield optimization. Due to a subtle combination of deterministic and stochastic approa...
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