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Titel:

Improving on State Register Identification in Sequential Hardware Reverse Engineering

Dokumenttyp:
Konferenzbeitrag
Autor(en):
Brunner, M. and Baehr, J. and Sigl, G.
Abstract:
In the past years, new hardware reverse engineering methods for sequential gate-level netlists have been developed to detect Hardware Trojans and counteract Design Piracy. A critical part of sequential gate-level netlist reverse engineering is the identification of state registers. A promising method to solve this problem, RELIC, proposed by T. Meade et al., is based on input structure similarities of registers to differentiate between state and non-state registers. We propose an improvement to...     »
Stichworte:
Registers; Logic gates; Reverse engineering; Hardware; Heuristic algorithms; Complexity theory; Clocks; Hardware Reverse Engineering; Sequential Reverse Engineering; State Register Identification; FSM Extraction
Dewey-Dezimalklassifikation:
620 Ingenieurwissenschaften
Kongress- / Buchtitel:
2019 IEEE International Symposium on Hardware Oriented Security and Trust (HOST)
Kongress / Zusatzinformationen:
Washington, D.C., USA
Jahr:
2019
Quartal:
2. Quartal
Jahr / Monat:
2019-05
Monat:
May
Seiten:
151-160
Volltext / DOI:
doi:10.1109/HST.2019.8740844
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