DRAM Yield Analysis and Optimization by a Statistical Design Approach
IEEE_J_CASI_RP
2011
58
12
dec
2906-2918
An energy-efficient supply voltage scheme using in-situ Pre-Error detection for on-the-fly voltage adaptation to PVT variations
Proc. 13th International Symposium on Integrated Circuits (ISIC)
2011
Comparison of In-situ Delay Monitors for Use in Adaptive Voltage Scaling
Kleinheubacher Tagung, Miltenberg
2011
Sensing cellular adhesion with a CMOS integrated impedance-to-frequency converter
IEEE Sensors Applications Symposium (SAS)
2011
A CMOS integrated cell adhesion sensor for lab-on-a-chip applications
Proceedings of Conference on Bioelectronics, Biomedical, and Bioinspired Systems Nanotechnology
2011
Reducing impact of degradation on analog circuits by chopper stabilization and autozeroing
International Symposium on Quality Electronic Design (ISQED)
2011
Proof of Concept for Mitigation of Aging Induced Degradation in Differential Circuits using Chopper Stabilization
Proceedings of Austrochip Workshop
ISBN: 978-3-200-02384-0
2011
A fully-integrated system power aware LDO for energy harvesting applications
Symposium on VLSI Circuits (VLSIC)
2011
DRAM Yield Analysis and Optimization by a Statistical Design Approach
IEEE Transactions on Circuit and Systems I: Regular Papers
2011
58
12
2906-2918