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Title:

Assessing Cache False Sharing Effects by Dynamic Binary Instrumentation

Document type:
Konferenzbeitrag
Author(s):
Günther, S.M. and Weidendorfer, J.
Abstract:
Unnecessary sharing of cache lines among threads of a program due to private data which is located in close proximity in memory is a performance obstacle. Depending on access frequency to this data and scheduling of threads to processor cores, this can lead to substantial overhead because of latency induced by cache lines exchanges, known as false sharing. Since processor hardware can not distinguish these effects from real data exchange (true sharing), all measurement tools have to rely on heur...     »
Book / Congress title:
Workshop on Binary Instrumentation and Applications, in cooperation with the 42nd Annual IEEE/ACM International Symposium on Microarchitecture (MICRO)
Congress (additional information):
December 12, 2009, NYC, NY, U.S.A.
Year:
2009
Year / month:
2009-12
Month:
December
Language:
en
TUM Institution:
Associate Institute for Signal Processing
Format:
text
Ingested:
22.08.2013
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