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- Title:
Design-Phase Buffer Allocation for Post-Silicon Clock Binning by Iterative Learning
- Document type:
- Zeitschriftenaufsatz
- Author(s):
- Zhang, Li; Li, Bing; Liu, Jinglan; Shi, Yiyu; Schlichtmann, Ulf
- Journal title:
- IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
- Year:
- 2018
- Journal volume:
- 37
- Month:
- feb
- Journal issue:
- 2
- Pages contribution:
- 392--405
- Fulltext / DOI:
- doi:10.1109/TCAD.2017.2702632
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