DiaSys: On-Chip Trace Analysis for Multi-processor System-on-Chip

To find the cause of a functional or non-functional defect (bug) in software running on multi-processor System-on-Chip (MPSoC), developers need insight into the chip. For that, most of today’s SoCs have hardware tracing support. Unfortunately, insight is restricted by the insufficient off-chip bandwidth, a problem which is expected to become more severe in the future as more functionality is integrated on-chip. In this paper, we present a novel tracing system architecture, the diagnosis system “DiaSys.” It moves the analysis of the trace data from the debugging tool on a host PC into the chip, avoiding the off-chip bandwidth bottleneck. To enable on-chip processing, we propose to move away from trace data streams towards self-contained diagnosis events. These events can then be transformed on-chip by processing nodes to increase the information density, and then be transferred off-chip with less bandwidth. We evaluate the concept with a prototype hardware implementation, which we use to find a functional software bug. We show that on-chip trace processing can significantly lower the off-chip bandwidth requirements, while providing insight into the software execution equal to existing tracing solutions.     «

To find the cause of a functional or non-functional defect (bug) in software running on multi-processor System-on-Chip (MPSoC), developers need insight into the chip. For that, most of today’s SoCs have hardware tracing support. Unfortunately, insight is restricted by the insufficient off-chip bandwidth, a problem which is expected to become more severe in the future as more functionality is integrated on-chip. In this paper, we present a novel tracing system architecture, the diagnosis system “...     »