{I}n situ measurement of aging-induced performance degradation in digital circuits

circuit reliability; digital circuits; time-digital conversion; timing; PVTA; TDC; aging induced performance degradation; aging mechanisms; circuit reliability status; digital circuits; functional failure; functional paths; in situ timing monitors; intra-die variations; measurement data analysis; process voltage temperature and aging; time to digital converter; timing behavior; timing properties; timing violations; Aging; Monitoring; Stress; Stress measurement; Temperature measurement; Temperature sensors; Timing     «

circuit reliability; digital circuits; time-digital conversion; timing; PVTA; TDC; aging induced performance degradation; aging mechanisms; circuit reliability status; digital circuits; functional failure; functional paths; in situ timing monitors; intra-die variations; measurement data analysis; process voltage temperature and aging; time to digital converter; timing behavior; timing properties; timing violations; Aging; Monitoring; Stress; Stress measurement; Temperature measurement; Temperatu...     »