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Dokumenttyp:
Konferenzbeitrag 
Autor(en):
Ravi Kumar Pujari, Thomas Wild, Andreas Herkersdorf 
Titel:
A Hardware-based Multi-objective Thread Mapper for Tiled Manycore Architectures 
Abstract:
Thread mapping is typically performed as an integral part of cooperative or pre-emptive operating system (OS) scheduling in order to share the processor core(s) among competing applications. Schedulers usually follow a single-objective performance optimization, such as maximizing core utilization or satisfying deadlines by the prioritization of threads. Meeting multiple orthogonal objectives, like performance vs. power or thermal resilience, in the era of manycore processors is a challenge becau...    »
 
Stichworte:
InvasIC B3 
Dewey-Dezimalklassifikation:
620 Ingenieurwissenschaften 
Kongress- / Buchtitel:
33rd IEEE International Conference on Computer Design (ICCD) 
Konferenzort:
New York 
Datum der Konferenz:
October 18-21 
Jahr:
2015 
Jahr / Monat:
2015-10 
Monat:
Oct 
Seiten:
459 - 462 
Sprache:
en 
TUM Einrichtung:
Lehrstuhl für Integrierte Systeme