The RC-delay and crosstalk noise of the interconnect system are major problems in modern and future high-performance semiconductor chips. For that reason, the coupling capacitance or the k-value of the insulator between the metal lines has to be reduced, which can be achieved by substituting SiO2 by so-called low-k materials or by integration of cavities, called air gaps. In this work, air gaps fabricated by the selective O3/TEOS deposition are considered for reduction of the line-to-line capacitance. Different integration schemes with air gaps were fabricated; air gaps requiring an additional lithography in a single and double layer Cu damascene metallization, self-aligned air gaps in Cu and in tungsten metallization, utilizing RIE (reactive ion etch) processing and air gaps fabricated by use of non-conformal deposition processes for the insulator in a 90nm Al RIE metallization scheme. For comparison of the properties of air gaps, structures were fabricated with and without air gaps. The investigation shows that air gaps offer a substantial reduction of the line-to-line capacitance up to 50%, corresponding to an effective k-value of keff = 2.3 while using of standard SiO2 and Si3N4 as materials of choice for the insulator. Measurements from the first to the second metal layer show, as expected, only a marginal reduction of the coupling capacitance of 10%. It could be shown that due to the hybrid structure of air gaps, the crosstalk can be reduced more efficiently than with a uniform low-k material. As a consequence of the high aspect ratio of the metal lines, the self-aligned air gaps in Al RIE metallization results in a very low effective k-value (keff = 1.8). All keff-values obtained by simulations are in good agreement with the measured capacitance values. The keff-value strongly depends on the geometry variations, which have been evaluated by additional simulations and can be optimized by extending the air gaps above and below the metal lines and increasing the aspect ratio of the metal lines. Vertical and horizontal air gap displacements are not critical. A keff = 1.9 was calculated for air gaps in SiO2 material, a line aspect ratio of 2.0 and an air gap height of 1.4 times the line height. The breakdown field strength of air gap structures is lower (5-6MV/cm) than of full structures (8.4MV/cm). Compared to full structures, the leakage current of air gap structures is 30% higher at an electric field strength of 1MV/cm and 125°C. This can be explained by surface leakage currents and field enhancement inside the air gaps. The conduction mechanism between metal lines isolated by air gap structures can be described by the Frenkel-Poole mechanism at 20°C and Schottky emission at 140°C. A Frenkel-Poole behavior of full structures can be seen at all temperatures. Electromigration reliability tests showed an activation energy value of Ea = 0.79±0.05eV and current density exponent of n = 1.1±0.2 for air gaps and Ea = 0.83±0.07eV, n = 1.1±0.2 for full structures. Despite totally different failure mechanisms observed by SEM, the structures show comparable extracted lifetimes of 10.6a for air gap and 9.6a for full structures at 105°C, 5mA/μm2 use conditions. Finally, the impact of air gaps on self-heating of the metal lines was measured and simulated, showing a 75% higher temperature increase compared to structures in dense SiO2. In relation to the integration of porous low-k materials as intermetal and interlevel dielectric, the temperature increase of air gaps is only one quarter. The results show that air gaps fabricated by the selective O3/TEOS deposition can be integrated in a damascene or RIE metallization scheme. They display very promising electrical properties and exhibit an attractive alternative to low-k or ultra-low-k materials.     «

The RC-delay and crosstalk noise of the interconnect system are major problems in modern and future high-performance semiconductor chips. For that reason, the coupling capacitance or the k-value of the insulator between the metal lines has to be reduced, which can be achieved by substituting SiO2 by so-called low-k materials or by integration of cavities, called air gaps. In this work, air gaps fabricated by the selective O3/TEOS deposition are considered for reduction of the line-to-line c...     »

Die stetige Verkleinerung der Abmessungen in modernen integrierten Schaltungen und die damit verbundenen längeren Verzögerungszeiten stellen ein immer größeres Problem für die Schaltgeschwindigkeit dar. Diese Arbeit befasst sich mit der Entwicklung, Herstellung und Charakterisierung von Air Gap Strukturen als Dielektrikum zwischen Leiterbahnen, einem möglichen Lösungsansatz zur Verringerung der Koppelkapazitäten. Messungen und Simulationen zeigten, dass durch die Implementierung von Air Gaps eine Reduzierung des Übersprechens von mehr als 50% erreicht werden kann. Die Zuverlässigkeit, Leckströme und Widerstände der Leiterbahnen werden dadurch nicht beeinflusst und sind vergleichbar derer konventioneller Strukturen. Air Gap Strukturen können in den Standard Back End Of Line Prozess (BEOL) integriert werden und zeigen sehr gute elektrische Eigenschaften, was sie zu einer interessanten Alternative zu low-k Dielektrika macht.      «

Die stetige Verkleinerung der Abmessungen in modernen integrierten Schaltungen und die damit verbundenen längeren Verzögerungszeiten stellen ein immer größeres Problem für die Schaltgeschwindigkeit dar. Diese Arbeit befasst sich mit der Entwicklung, Herstellung und Charakterisierung von Air Gap Strukturen als Dielektrikum zwischen Leiterbahnen, einem möglichen Lösungsansatz zur Verringerung der Koppelkapazitäten. Messungen und Simulationen zeigten, dass durch die Implementierung von Air Gaps ein...     »