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Title:

Seesaw: An Area-Optimized FPGA Viterbi Decoder for PUFs

Document type:
Konferenzbeitrag
Contribution type:
Vortrag / Präsentation
Author(s):
Hiller, Matthias and Rodrigues Lima, Leandro and Sigl, Georg
Abstract:
Physical Unclonable Functions PUFs are popular security primitives to provide cryptographic keys on FPGAs. However, PUFs require error correction to create reliable cryptographic keys. This work presents a highly optimized Viterbi decoder, adapted to the constraints of PUFs on FPGAs, primarily area but also low power. Our Seesaw architecture contains two block RAMs that are connected through a custom low-area data path. As main result, alternating data access patterns reduce the complexity...     »
Keywords:
Physical Unclonable Functions (PUFs), Error Correction, Convolutional Code, Viterbi Algorithm, VLSI, FPGA
Dewey Decimal Classification:
620 Ingenieurwissenschaften
Book / Congress title:
EUROMICRO Conference on Digital System Design (DSD) 2014
Congress (additional information):
Verona, Italy
Year:
2014
Quarter:
3. Quartal
Year / month:
2014-08
Month:
Aug
Reviewed:
ja
Language:
en
WWW:
http://esd.scienze.univr.it/dsd-seaa-2014/?page_id=22
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