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Titel:

Optimal Wire Ordering and Spacing in Low Power Semiconductor Design

Dokumenttyp:
Zeitschriftenaufsatz
Autor(en):
Gritzmann, P.; M. Ritter and P. Zuber
Abstract:
A key issue for high integration circuit design in the semiconductor industry are power constraints that stem from the need for heat removal and reliability or battery lifetime limitations. As the power consumption depends heavily on the capacitances between adjacent wires, determining the optimal ordering and spacing of parallel wires is an important issue in the design of low power chips. As it turns out, optimal wire spacing is a convex optimization problem whereas the optimal wire ordering i...     »
Stichworte:
Optimal Wire Placement·Convex Programming·Combinatorial Optimization · Hamilton Path
Zeitschriftentitel:
Mathematical Programming
Jahr:
2010
Band / Volume:
121
Heft / Issue:
2
Seitenangaben Beitrag:
201-220
Reviewed:
ja
Sprache:
en
Volltext / DOI:
doi:DOI https://doi.org/10.1007/s10107-008-0231-z
WWW:
https://link.springer.com/article/10.1007/s10107-008-0231-z
Verlag / Institution:
Springer
E-ISSN:
1436-4646
Eingereicht (bei Zeitschrift):
28.09.2007
Angenommen (von Zeitschrift):
01.05.2008
Publikationsdatum:
03.06.2008
TUM Einrichtung:
Lehrstuhl für Angewandte Geometrie und Diskrete Mathematik
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