With the increasing power densities, managing the on-chip temperature has become an important design challenge, especially for hard real-time systems. This paper addresses the problem of minimizing the peak temperature under hard real-time constraints using a combination of dynamic voltage scaling and dynamic power management. We derive a closed-form formulation for the peak temperature and provide a genetic-algorithm-based approach to solve the problem. Our approach is evaluated with both simulations and real measurements with an Intel i5 processor. The evaluation results demonstrate the effectiveness of the proposed approach compared to related works in the literature.     «

With the increasing power densities, managing the on-chip temperature has become an important design challenge, especially for hard real-time systems. This paper addresses the problem of minimizing the peak temperature under hard real-time constraints using a combination of dynamic voltage scaling and dynamic power management. We derive a closed-form formulation for the peak temperature and provide a genetic-algorithm-based approach to solve the problem. Our approach is evaluated with both simul...     »