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Title:

{A} 2 {GH}z 244 fs-{R}esolution 1.2 ps-{P}eak-{INL} {E}dge {I}nterpolator-{B}ased {D}igital-to-{T}ime {C}onverter in 28 nm {CMOS}

Author(s):
Sievert, S.; Degani, O.; Ben-Bassat, A.; Banin, R.; Ravi, A.; Thomann, W.; Klepser, B. U.; Boos, Z.; Schmitt-Landsiedel, D.
Keywords:
CMOS digital integrated circuits; dividing circuits; interpolation; time-digital conversion; CMOS technology; DTC; MMD; control logic; digital-to-time converter; frequency 2 GHz; integral nonlinearity; interpolation process; multimodulus divider; peak-INL edge interpolator; phase interpolator; shoot-through current; size 28 nm; time 1.2 ps; time 244 fs; tuning blocks; Computer architecture; Delays; Interpolation; Jitter; Linearity; Signal resolution; Tuning; DNL; DPC; DTC; Digital-to-phase conve...     »
Journal title:
IEEE Journal of Solid-State Circuits
Year:
2016
Journal volume:
51
Month:
Dec
Journal issue:
12
Pages contribution:
2992-3004
Fulltext / DOI:
doi:10.1109/JSSC.2016.2592620
Print-ISSN:
0018-9200
 BibTeX