While the importance of object based video coding increases due to more and more wide spread usage of MPEG-4, video object generation is complex and difficult to implement. Thus, a new hardware architecture for the acceleration and real-time implementation of video object segmentation is proposed. The core of the CONIAN architecture (CONfigurable Image ANalysis coprocessor) is an efficient memory system utilizing a 2D-cache for images and a configurable processing unit. Despite it utilizes less area and a lower clock frequency, the proposed architecture is 24 times faster compared to an universal processor implemented with a technology of the same size. A new simulation methodology basing on the coupling of architecture models with software algorithm models was used for the development of the architekture, allowing a systematic architecture comparison and optimization.
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While the importance of object based video coding increases due to more and more wide spread usage of MPEG-4, video object generation is complex and difficult to implement. Thus, a new hardware architecture for the acceleration and real-time implementation of video object segmentation is proposed. The core of the CONIAN architecture (CONfigurable Image ANalysis coprocessor) is an efficient memory system utilizing a 2D-cache for images and a configurable processing unit. Despite it utilizes less...
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