Technology and Circuit Optimization of Resistive RAM for Low-Power, Reproducible Operation

or Resistive RAM (RRAM), reproducibility in large arrays requires control of capacitive surge currents during programming. In this work, we present results from a 256kb RRAM chip which demonstrate how device optimization in conjunction with innovative circuits can control surge currents due to inherent cell and array parasitics. We propose a fab-friendly TiN/conductive TaOx/HfO2/TiN bi-layer RRAM that gives 2x lower power and improves variability and switching yield compared to conventional HfO2 RRAMs. Our studies reveal new insight that current crowding in RRAMs with conductive metal oxide electrodes improves thermal efficiency and damps surge currents, leading to the improved characteristics. A novel circuit to control surge current is proposed and demonstrated that improves write current by 40% and endurance by 63%. Switching, endurance and data retention results for the 256kb chip are presented.     «

or Resistive RAM (RRAM), reproducibility in large arrays requires control of capacitive surge currents during programming. In this work, we present results from a 256kb RRAM chip which demonstrate how device optimization in conjunction with innovative circuits can control surge currents due to inherent cell and array parasitics. We propose a fab-friendly TiN/conductive TaOx/HfO2/TiN bi-layer RRAM that gives 2x lower power and improves variability and switching yield compared to conventional HfO2...     »