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Title:

[EN] Bottom electrodes for use with metal oxide resistivity switching layers

Document type:
Patent
Patent number:
US 8772749 B2
Inventor:
KREUPL FRANZ, DE ; MAKALA RAGHUVEER S, US ; SEKAR DEEPAK CHANDRA, US
Assignee:
KREUPL FRANZ, DE ; MAKALA RAGHUVEER S, US ; SANDISK 3D LLC, US ; SEKAR DEEPAK CHANDRA, US
Abstract:
In a first aspect, a metal-insulator-metal (MIM) stack is provided that includes (1) a first conductive layer comprising a silicon-germanium (SiGe) alloy; (2) a resistivity-switching layer comprising a metal oxide layer formed above the first conductive layer; and (3) a second conductive layer formed above the resistivity-switching layer. A memory cell may be formed from the MIM stack. Numerous other aspects are provided.
Patent office:
us
Publication date patent:
08.07.2014
Year:
2014
Language:
en
Covered by:
Scopus
TUM Institution:
Hybride Elektronische Systeme
Format:
Text
 BibTeX