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Titel:

Technology and Circuit Optimization of Resistive RAM for Low-Power, Reproducible Operation

Dokumenttyp:
Konferenzbeitrag
Art des Konferenzbeitrags:
Elektronisches Dokument
Autor(en):
D. Sekar, B. Bateman, U. Raghuram, S. Bowyer, *Y. Bai, M. Calarrudo, P. Swab, J. Wu, S. Nguyen, N. Mishra, R. Meyer, M. Kellam, B. Haukness, C. Chevallier, * H. Wu, * H. Qian, ** F. Kreupl and G. Bronner
Abstract:
or Resistive RAM (RRAM), reproducibility in large arrays requires control of capacitive surge currents during programming. In this work, we present results from a 256kb RRAM chip which demonstrate how device optimization in conjunction with innovative circuits can control surge currents due to inherent cell and array parasitics. We propose a fab-friendly TiN/conductive TaOx/HfO2/TiN bi-layer RRAM that gives 2x lower power and improves variability and switching yield compared to conventional HfO2...     »
Herausgeber:
IEEE
Kongress- / Buchtitel:
IEDM
Kongress / Zusatzinformationen:
International Electron Devices Meeting (IEDM)
Ausrichter der Konferenz:
IEEE
Datum der Konferenz:
15.12.2014
Verlag / Institution:
IEEE
Publikationsdatum:
15.12.2014
Jahr:
2014
Nachgewiesen in:
Scopus
TUM Einrichtung:
Hybride Elektronische Systeme
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