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Dokumenttyp:
Konferenzbeitrag 
Art des Konferenzbeitrags:
Vortrag / Präsentation 
Autor(en):
Hiller, Matthias and Rodrigues Lima, Leandro and Sigl, Georg 
Titel:
Seesaw: An Area-Optimized FPGA Viterbi Decoder for PUFs 
Abstract:
Physical Unclonable Functions PUFs are popular security primitives to provide cryptographic keys on FPGAs. However, PUFs require error correction to create reliable cryptographic keys. This work presents a highly optimized Viterbi decoder, adapted to the constraints of PUFs on FPGAs, primarily area but also low power. Our Seesaw architecture contains two block RAMs that are connected through a custom low-area data path. As main result, alternating data access patterns reduce the comple...    »
 
Stichworte:
Physical Unclonable Functions (PUFs), Error Correction, Convolutional Code, Viterbi Algorithm, VLSI, FPGA 
Dewey-Dezimalklassifikation:
620 Ingenieurwissenschaften 
Kongress- / Buchtitel:
EUROMICRO Conference on Digital System Design (DSD) 2014 
Kongress / Zusatzinformationen:
Verona, Italy 
Konferenzort:
Verona, Italy 
Jahr:
2014 
Quartal:
3. Quartal 
Jahr / Monat:
2014-08 
Monat:
Aug 
Reviewed:
ja 
Sprache:
en